High frequency characterization of 100 micron pitch wafer level package interconnects

by Jayabalan, J., Rotaru, M.D.
Published 2014

Novel circuit model for three-dimensional geometries with multilayer dielectrics

by Jayabalan, J., Ooi, B.-L., Leong, M.-S., Iyer, M.K.
Published 2014

Modelling and application of elastomer mesh for microwave probing

by Jayabalan, J., Ooi, B.-L., Leong, M.S., Iyer, M.K.
Published 2014

Circuit model of elastomer probe for fine pitch wafer level package test applications

by Jayabalan, J., Ooi, B.L., Leong, M.S., Iyer, M.K.
Published 2014

Energetics of copper nanowires

by Jayabalan, J., Jayaganthan, R., Tay, A.A.O., Leong, O.B.
Published 2014

A scaling technique for partial element equivalent circuit analysis using SPICE

by Jayabalan, J., Leong, O.B., Seng, L.M., Iyer, M.K.
Published 2014

PEEC model for multiconductor systems including dielectric mesh

by Jayabalan, J., Ooi, B.L., Irene, A., Leong, M.S., Iyer, M.K.
Published 2014

A methodology for accurate modeling of a pad structure from S-parameter measurements

by Jayabalan, J., Ooi, B.L., Wu, B., Xu, D.S., Iyer, M.K., Leong, M.S.
Published 2014

Test bench modeling and characterization for fine pitch wafer level packaged devices

by Jayabalan, J., Mihai, R.D., Tan, J.P.H., Iyer, M.K., Leong, O.B., Seng, L.M.
Published 2014

A novel test strategy for fine pitch wafer-level packaged devices

by Jayabalan, J., Rotaru, M.D., Rao, V.S., Kripesh, V., Iyer, M.K., Tay, A.A.O., Ooi, B.-L., Leong, M.-S.
Published 2014