IDEF* modeling of a post-assembly IC (Integrated Circuit) manufacturing process
Develop a detailed description of a post assembly IC manufacturing process from the five different views using the IDEF* methodology namely function, information, process, resource and organisation.
Saved in:
主要作者: | |
---|---|
其他作者: | |
格式: | Theses and Dissertations |
出版: |
2008
|
主題: | |
在線閱讀: | http://hdl.handle.net/10356/6376 |
標簽: |
添加標簽
沒有標簽, 成為第一個標記此記錄!
|
機構: | Nanyang Technological University |