Design of a low-voltage input-output rail-to-rail CMOS buffer
The objective of this project is to design a buffer, which is able to work below a supply of 1.5 V typical and remain in operation even at 1.2 V or lower in the worst case for use in bond pad designs.
Saved in:
| 主要作者: | |
|---|---|
| 其他作者: | |
| 格式: | Theses and Dissertations |
| 出版: |
2008
|
| 主題: | |
| 在線閱讀: | http://hdl.handle.net/10356/3845 |
| 標簽: |
添加標簽
沒有標簽, 成為第一個標記此記錄!
|