Language-specific RISC engine based on bi-polar building blocks

Reduced instruction set computers have made a significant impact on the development of high-speed microcomputer and have revolutionized the use of computers at all levels of society. This report traces the design and implementation of a RISC processor for a language specific (sub-set of C).

Saved in:
書目詳細資料
主要作者: Chan, Choong Wah.
其他作者: School of Electrical and Electronic Engineering
格式: Research Report
出版: 2008
主題:
在線閱讀:http://hdl.handle.net/10356/3023
標簽: 添加標簽
沒有標簽, 成為第一個標記此記錄!