Optional layout of input / output protection devices

• المؤلفون الرئيسيون: Liu, Po Ching., Siek, Liter.
• مؤلفون آخرون: School of Electrical and Electronic Engineering
• التنسيق: Research Report
• منشور في: 2008
• الموضوعات: DRNTU::Engineering::Electrical and electronic engineering::Electronic apparatus and materials
• الوصول للمادة أونلاين: http://hdl.handle.net/10356/2717

This project was initiated for the effective design and layout of input protection devices. Scope of this work includes setting up prototype ESD testing environment, studying the layout of commercial chips and the ESD threshold voltages, then test our own design on the chip fabricated.