A single-channel voltage-scalable 8-GS/s 8-b > 37.5-dB SNDR time-domain ADC with asynchronous pipeline successive approximation in 28-nm CMOS

• Main Authors: Chen, Qian, Boon, Chirn Chye, Liu, Qing, Liang, Yuan
• 其他作者: School of Electrical and Electronic Engineering
• 格式: Article
• 語言: English
• 出版: 2023
• 主題: Engineering::Electrical and electronic engineering; Asynchronous Pipeline Successive Approximation; High Speed
• 在線閱讀: https://hdl.handle.net/10356/167258
• 機構: Nanyang Technological University

This article presents a single-channel voltage-scalable 8-GS/s 8-b time-domain analog-to-digital-converter (TD-ADC). It breaks the speed limit of traditional TD-ADC by leveraging asynchronous pipeline successive approximation (APSA), which reduces the quantization period to approximate one-stage tim...