On chip pulse based neural network for signal processing

This research investigates a digital hardware oriented system that uses a genetic algorithm (GA) for optimizing a pattern classifier based on the pulsed neural network (PNN). The scheme avoids the usage of multipliers and dividers, which are the bottlenecks for digital hardware implementation of p...

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書目詳細資料
主要作者: Low, Kay Soon
其他作者: School of Electrical and Electronic Engineering
格式: Research Report
語言:English
出版: 2008
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在線閱讀:http://hdl.handle.net/10356/14168
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