, D., & , I. B. S. (2009). Implementasi tapis digital finite impulse response (FIR) berbasis FPGA (Field Programmable Gate Arrays). [Yogyakarta] : Universitas Gadjah Mada.
Chicago Style Citation, DERMAWAN, and Ir. Bambang Sutopo. Implementasi Tapis Digital Finite Impulse Response (FIR) Berbasis FPGA (Field Programmable Gate Arrays). [Yogyakarta] : Universitas Gadjah Mada, 2009.
MLA Citation, DERMAWAN, and Ir. Bambang Sutopo. Implementasi Tapis Digital Finite Impulse Response (FIR) Berbasis FPGA (Field Programmable Gate Arrays). [Yogyakarta] : Universitas Gadjah Mada, 2009.
Warning: These citations may not always be 100% accurate.