作者搜索結果

1

Wide-input dynamic range 1 MHz clock ultra-low supply flip-flop

Wide-input dynamic range 1 MHz clock ultra-low supply flip-flop

由 Siek, Liter, Palaniappan, Arjun Ramaswami
出版 2018

獲取全文
獲取全文

Article

2

A 0.6 V, 1.74 ps resolution capacitively boosted time-to-digital converter in 180 nm CMOS

A 0.6 V, 1.74 ps resolution capacitively boosted time-to-digital converter in 180 nm CMOS

由 Palaniappan, Arjun Ramaswami, Siek, Liter
出版 2021

獲取全文

Conference or Workshop Item

3

A TDC-less all-digital phase locked loop for medical implant applications

A TDC-less all-digital phase locked loop for medical implant applications

由 Palaniappan, Arjun Ramaswami, Siek, Liter
出版 2021

獲取全文

Article

4

A 0.0186 mm2, 0.65 V supply, 9.53 ps RMS jitter all-digital PLL for medical implants

A 0.0186 mm2, 0.65 V supply, 9.53 ps RMS jitter all-digital PLL for medical implants

由 Palaniappan, Arjun Ramaswami, Siek, Liter
出版 2021

獲取全文

Conference or Workshop Item